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Direct Memory Access (DMA) | Cypress Semiconductor

Direct Memory Access (DMA)

Last Updated: 
Mar 19, 2018
  • 24 channels
  • Eight priority levels
  • 128 Transaction Descriptors (TDs)
  • 8-, 16-, and 32-bit data transfers
  • Configurable source and destination addresses
  • Support for endian compatibility
  • Can generate an interrupt when data transfer is complete
  • DMA Wizard to assist with application development
Symbol Diagram
DMA Segmatic

General Description

The DMA component allows data transfers to and from memory, components, and registers. The controller supports 8-, 16-, and 32-bit wide data transfers, and can be configured to transfer data between a source and destination that have different endianess. TDs can be chained together for complex operations.

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