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Reset (PDL_RESET) | Cypress Semiconductor


Last Updated: 
Feb 27, 2018
  • Reports the cause of a device reset
  • Power-on or INITX reset
  • Software reset
  • Watchdog reset
  • Clock failure or anomalous frequency detect
Symbol Diagram
Reset_Symbol Diagram

General Description

The Reset Component determines the cause of a device reset. It is often used to manage serious application problems gracefully.

Note: the application must enable clock failure and anomalous frequency detection with the Clock Supervisor (CSV) component.

Note: resets from standby mode are configured and detected in the Low Power Mode (LPM) Component, not Reset.